1. Field of the Invention
This invention relates to a semiconductor device, and more particularly to a semiconductor device having a shallow trench isolation structure removing the narrow width effect and a method for fabricating the same.
2. Description of the Prior Art
The local oxidation of silicon process (LOCOS) and the recessed local oxidation of silicon process (RLOCOS) have been used for the isolation technique of semiconductor devices. In the local oxidation method, the shape of the field oxide layer at the an oxidation mask edges is that of a slowly tapering oxide wedge that merges into the pad oxide layer, which is disposed between a silicon substrate and the oxidation mask, it has been referred to as a bird's beak. The bird's beak is a lateral extension of the filed oxide layer into the active area, whereby the active area is reduced.
As the integration of semiconductor devices are increased, it is very important to obtain the correct active area, therefore the shallow trench isolation (STI) technique capable of removing the bird's beak is highlighted.
The FIGS. 1A to 1D, are cross sectional views of a semiconductor device having a shallow trench isolation structure according to a conventional method.
First, referring to FIG. 1A, a silicon oxide layer 2 and a silicon nitride layer 3 are formed, in order, on a silicon substrate 1, and photoresist patterns 4 are formed on the silicon nitride layer 3. Thereafter, the silicon nitride layer 3, the silicon oxide layer 2 and the silicon substrate 1 are selectively etched to form a trench using photoresist patterns 4 as an etching mask.
Referring to FIG. 1B, photoresist patterns 4 are removed and an oxide layer 5 is formed on the side walls and the bottom of the trench to prevent the silicon substrate 1 from being damaged in the channel stop ion implantation process. Thereafter, ions 6 are implanted into the silicon substrate around the trench so that a channel stop ion implantation layer 7 is formed. In the channel stop ion implantation process, the ions 6 are implanted obliquely into the trench to increase the dopant concentration in the sidewalls of the trench, whereby the depletion phenomenon is prevented.
Referring to FIG. 1C, an insulating layer 8 is formed to isolate devices on the resulting structure, thereby fully filling the trench with the insulating material.
Referring to FIG. 1D, the insulating layer 8 is etched by the chemical-mechanical polishing method, and then a buried insulating layer 8a is formed in the trench.
The dopants in the sidewalls of the trench flow into the buried insulating layer 8a during the thermal treatment process. Therefore the leakage current increases due to the depletion effect.
As a method for solving the above mentioned problem, ions are implanted obliquely into the sidewalls of the trench to increase the dopant concentration in the sidewalls. However, in this case, it is difficult to obtain the concentration uniformity over the sidewalls, and moreover the channel width is reduced by the dopants in the region near the silicon substrate. This is referred to as the narrow width effect of the device.
FIG. 2 shows the dependency of the ion concentration on the depth along the line a-a' in FIG. 1D. The solid line shows the dopant concentration and the dotted line shows the target value of the dopant concentration. As shown in FIG. 2, the dopant concentration is higher than the target values in the region near the silicon substrate surface, but is lower than the target values in the other region.
As mentioned above, the channel stop ion implantation process is carried out to reduce the leakage current, but it may cause the serious problem of the narrow width effect.